Here are the signals and their
frequencies:
3.069MHz
1.6345MHz
.7673MHz
.3837MHz
.1918MHz
96,000Hz
48,000Hz
16,000Hz
16,000Hz
7993Hz
3996Hz
1998Hz
av
970Hz
16V
485Hz
32V
242Hz
64V
120Hz
128V
60Hz
VSYNC
60Hz
HSYNC
15,984Hz
HBLANK
15,625Hz
VBLANK
60Hz
Pin 12 1 N 45,454Hz
Pin 8 1 N
60Hz
1H
2H
4H
SH
16H
32H
64H
128H
266H
1V
2V
4V
Of course the above readings
are not textbook, but are listed in
order for rough comparison. What
is important is that they are all
there and are properly divided by
the counters.
RESETIRGl
This section shows the watchdog
reset counter (11 C). The Z·SOA
must clear this counter every
260msec or else the counter
reaches a terminal count of 15 10
bringing pin 15 high which in turn
drives the RESET line low, resetting
the MPU. If this counter is defective
so it can't pulse the reset line, the
logic would freeze or become out
of control, and the game would be
out of order unless it was turned off
and then back on. This watchdog
prevents service calls due to static
hitting the logic.
The three to eight line decoder
(5P) selects the coin counter driver
circuit, enables the picture to invert
for the second player in a cocktail
game, resets the interrupt flip flop
(CPU section) after the CPU ser-
vices the interrupt as it occurs, and
enables the sound by pulling pin 5
high. When 5P is cleared on power
up all the outputs are low. Yet the
sound enable line must be high for
sound to occur. This enable line is
set to high only once during power
up. It would be best to lift pin five of
5P and tie the pad/sound line high.
Pac-Man games sometimes lost
sound due to static resetting this
line to low, and this results in a
service call. Since this board is
much like Pac-Man, static may
cause the above problem in kind.
Time will tell if static will be a
problem. The "OPTN" line goes to
the freeze dipswitch option. This
disables the counter so it will not
reach a terminal count, and reset
the CPU.
CPU
There is nothing much to mention
about this section except the
schematic implying WR (pin 22)
goes somewhere. It doesn't.
RAM
This RAM is used by the CPU and
sync generator circuitry. There are
two 6116 RAMs which add to a
total of 4k of RAM. These replace
the 2114s used on Pac-Man boards
because they are more economical.
The CPU uses this for RAM and
also works alternately with the sync
generator circuitry by"stuffing" the
data which is used by the sync
generator into the locations the
sync generator addresses via the
prompt/stamp video circuitry.
Don't be fooled by the schematic.
The outputs, ABO·AB11, are
common with the outputs, ABO-
AB11 of the prompt/stamp video
section.
This goes for the sound section
as well. When the 2H signal is low,
the CPU can address and load data
into the sound section. When 2H is
high, the sync generator addresses
the sound section.
In a roundabout manner, the
CPU can get its data from the inputs
such as joystick positions. These
are handled by 6F and 6H. When
the CPU addresses an input, it must
wait for the WREQ line to go low for
the data to appear at the outputs of
6F.AtthissametimetheMPUgoes
into waiting, this byte is clocked
into the 6H chip if the IORQ line of
the CPU is active. The CPU then
reads the byte of data from 6H at its
next active cycle. Thus, the data
from the buffered data bus is not
available directly, but by the 6H
chip which functions as a 1 x8 bit
RAM. The out of phase 6MHz and
6M* signals provide for reliable data
transfer between these 6F and 6H
chips.
As you probably realize from
the above few paragraphs, the board
is sailing a tight ship, timing signal
wise. Even one good static spike
can throw this arrangement out of
sequence. Thank heavens for the
watchdog reset!
ROM
Five 2764s are used. A 2764 is a
8kx8 ROM in a 28-pin package. All
of the ROMs have a common enable
line (RD) at pin 22. They are sepa-
rately selected by the 7F chip. The
CS line at the 5M chip goes to pin
15 of 5F, part of the sync bus con-
troller. The two PA Ls work together
in a software protection arrange-
ment by altering the DO, D2, and D7
lines from the ROMs. As you see,
the above data lines from the RO Ms
must go through PAL B which is
operated by PAL A. PAL A is ad-
dressed by A5·A 15 and enabled by
the RD line, the same as is used to
address the ROMs. So what keeps
the PALS from becoming enabled
when the MPU is not addressing
the ROM? The 2H signal at pin 11
of PAL B disables DO, D2, and D7.
The schematic for PAL A is in error.
The labels on pin 12 and 14 are
reversed. SOPO should be A5 and
A5 should be SOPO. Also note M1,
A5 and A6 at PAL A are inputs, not
outputs.
1 H is for alteration of signals
which do not change often. An inter-
esting thing to note are the states
of these signals. All of the outputs
of 1 Hare high in the attract/cartoon
mode and low in the maze display.
These will each be mentioned briefly.
Chlp1H
MC
Pin
1 o
FC
9
RP
7
PB
CRB
5
4
Noting the scroll line is always
active, you can assume SO·S7 in
the SN section at chips 3R and 5N
will always be active. Also, know
the sync generator signals are
always active. You can assume the
outputsofchips3R, 5N, and4Nwill
be active. If you doubt the operation
of one of these chips is good even
though its output is erratic, you can
at leasttestthem by pulling selected
lines high or low with a jumper wire
for a short period of time, say five or
ten seconds. This will tell you if the
circuit is operating correctly logi-
cally, but will not tell you if it acts
correctly at the speed at which it is
Function
Goes to A 12, pin 2 of 2 E. During attract/cartoon
mode upper 4kx8 bytes of character ROM.
Failure of this line means certain characters
may be wrong during attract or game mode,
depending on failure.
Addresses pin 2 of 2C maze/scenery EPROM.
High-attract/low-maze. Failure could mean
maze parts in attract mode and vice versa.
Determines overlaying of characters on back-
ground objects. Failure could mean monsters
are under dots instead of over dots in maze, or
monsters in front of railing instead of behind it
on the bridge in the attract mode.
Both functions are for color. CRB selects upper/
lower 16 bytes of color at color outputs. PB
selects upper/lower half of 5623 (9P) memory.
Both signals terminate in color ROM section.
Chip 4B is involved in routing
data to the scrolling circuitry. It is
always enabled and is clocked by
the always active scroll line.
Although scroll does not origi-
nate here, let me mention that a
failure of this line means that the
monsters and Jr. Pac-Man won't
stay in the maze(scrolling problems
of the maze). It will affect the attractt
cartoon mazes as well, as scrolling
is used with them.
ADDRESS DECODE
This circuit is much the same as the
Pac-Man except the addition of the
scroll line on pin 13 of 4C and an
extra WR line (WR3) at pin 9 of 4E.
WRO and WR1 go to the sound
section. WR2 goes to the object
RAM. WR3 goes back to the ROM
section to enable chip 1 H.
SCROLLING/VIDEO
AND PROMPT/STAMP
VIDEO
Because the scrolling section also
contains the flip circuitry, we es-
sentially have a beefed-up V RAM
addresser circuit which was used
in Pac-Man. This section feeds into
the prompt/stamp video section
which addresses the 6116 RAMs.
These circuits are undoubtedly
complicated but you need not know
exactly how these circuits work to
guess that since they are involved
in display generation, the lines are
all active all of the time, with the
exception of the flip signal on the
scrolling/video section.
operated. It doesn't require sophis-
ticated test equipment to trouble-
shoot this section if you remember
what symptoms the TV picture
reveals. Should one of these
sections be faulty, it usually affects
the background objects and not
the mov,ng characters unless it's
the flip line.
LINE RAM
The "line RAM" is a 93422 256x4
bit RAM which is addressed by two
74LS161 counters which are cas-
caded to count to a total of 255 1 o·
The counters are loaded by the
CNTROLD signal from pin 8 of 8S
in the color ROM section and are
simultaneously clocked by the
6MHz signal. The RAM is enabled
by the OBJON line at pin 19. If the
OBJON line is high, no moving
characters will appear on the screen.
The DIX inputs to the 93422 (2B)
come from the color ROM section.
OBJECT RAM
These RAMs affect all moving
characters. RAM 2H has informa-
tion affecting the vertical position
of the characters and the 2J RAM
has info which affects the hori-
zontal movement. A failure in the
2 H RAM will mean a vertical change
of position of moving characters
and a fault in the 2J RAM will mean
jerky movement of characters,
depending on which line is shorted.