International Arcade Museum Library

***** DEVELOPMENT & TESTING SITE (development) *****

Star Tech Journal

Issue: 1983-April - Vol 5 Issue 2 - Page 9

PDF File Only

9
STAR*TECH JOURNAL/APRIL 1983
1. Fetch the next instruction from memory.
2. Read the operand (if required by the instruction).
3. Execute the instruction.
4. Write the results (if required by the instruction).
These steps are usually performed serially by most microprocessors. The architecture
of the 8088, however, allocates these steps to two separate processing units within the
CPU. The execution unit executes instructions while the bus interface unit fetches
instructions, reads operands and writes results. Both units work independently of each
other and are able to overlap instruction fetch with execution. This means that the time
required to fetch an instruction, during normal program sequence, disappears because
the execution unit executes instructions that have already been fetched by the bus
interface unit.
Below are listed several of the functions allowed by the minimum mode of the Intel
8088 microprocessor as applied to the GG-111 System: The NMI (Non-Maskable
Interrupt), pin 17, will receive pulses 61 times a second. The pulse is generated when the
CRT' s vertical blanking time begins. During this blanking time the background register
(E7) transfers data to the background buffer (E 10-11) through DMA (Direct Memory
Access) for the next frame. The DT/R (Data Transmit/Receive), pin 27, controls the
direction of data flow via the Data Transceivers ( C4) DIR (Direction Control Input)
pin. This allows data to flow from the A bus to the B bus or from the B bus to the A bus.
The DEN (Data Enable), pin 26, allows or disables data flow by placing a voltage level
on the G (Enable Input), pin 19, on the Data Transceiver (C4) _so that the bus is
effectively isolated. The ffi (Read Control), pin 3 2, manages the OE ( Output Enabl@)
of the program RO Ms as well as enabling the output of the Background Character
Register (E7) and the Input Port Select (Bl0). The l0/M (IO/Memory Control), pin
28, is utili~ to differentiate between either program memory or 1/0 on the processor's
bus. The WR (Write Control), pin 29, controls the read/write function of the system
RAM as well as clocking the Output Port Flip Flops (AS, A9, AlO).
This is a general pin function description that can be utilized when troubleshooting
the GG-111 System. The other pins on the microprocessor are all self-explanatory on
the illustration ( see Fig. 1 ).
4-0
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A'?)
A11
A17.
An
Al4
A15
A.
10
2, .R.E~ET
s
1.1.
HOW MANY TIMES ARE YOU WILLING TO
HEAR, "YOUR BOARDS ARE NOT READY
YET'? MAKE THE CHANGE - COME SEE
US AND GET RESULTS - NOT EXCUSES!
AO¢
A01
AO:l
A07>
AD4
ADS
AO"-
A07
RE.ADY
'1- -,Z'f
TIRED OF WAITING
FOR YOUR BOARDS?
AL~
81
"FLAT RATE"
prices for all repair and exchanges
on printed circuit boards:
C.PU
8089
17
In an effort to streamline the processing and speed up our
prinled circuit board repair/exchange program, we have
established a "flat rate" price for all repair and exchanges
(Monitor PC Boards not included).
These rates will NOT apply: (1) II board has been
brutalized or damaged by the customer. Missing components
wil! be charged separately. (2) Two sets of boards in metal
cases.
"Flat rate" charges will apply in ALL other cases.
NMI
H· l~TA
9
P.O. BOX 810
NICOMA PARK, OK
73066
Alo
CLK.
~
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Cals
Coin
College
MN/MXA8
8
2
TWO-WEEK COURSE
COVERS VIDEO AND
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OUR 11th YEAR!
405/789·534
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School Por
Electronic
lames
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HLOA
34 55¢
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IS
31
INT~
HO\.O
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LOGIC, CPU, MPU .. . $60
POWER SUPPLY ..... 41
SOLENOID DRIVER . . 41
SOUND/AUDIO . ..... 41
ATARI AUXILIARY ... 70
SCORE DISPLAY .. $41
LAMP DRIVER ...... 32
TRANSFORMER ..... 34
ATARI VECTOR
GENERATOR .... . . 70
RD
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10/M
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Fastest Service ... Quantity Discounts ... Call Now!
.z.~
FRISCO ELECTRONICS
& VENDING INC.
"""-
3299-19th Street San Francisco, CA 94103
L..__-+---'
20
FIGURE 1
Reprinted courtesy of Gottlieb's technical newsletter, "On Target".
(Authorized Atari Service Center)
OPEN 24 HOURS!
DAY: (415) 648-5466 NIGHT: (415)359-5641

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