Play Meter

continued from previous page
follows: When inputs A and Bare
at a logic 0, both diodes are
forward-biased . When the diodes
are forward-biased, V' equals VF
of the diodes. therefor, X is at a
logic 0 . Section 1 of fig. 6-5 illus-
trates this condition . When input
A orB i at a logic 1, the state of in-
put X is at a logic 0 as shown in
section two of the figure .
However, when both inputs A and
Bare at a logic 1, both the diodes
PROGRAMMED TEST/6
are zero-biased and V' then
equals V. The output X is then at
logic 1 as shown in section 3.
Calculations for the AND gate are
the same as for the OR gate of the
previous paragraph.
1
A circuit wh ich generates a high level at
the output only when all of the inputs are
at a high level is called an:
a. AND gate
GO TO BLOCK 10
b.
OR gate
GO TO BLOCK 20
2
YOU ARE INCORRECT!
B
X
The student should verify that the
operat ion of the d iode AND gate in
fig . 6-4 is cons istent with the AND
gate truth table in fig . 6-1 . Fig . 6-5
should be used as an aid for
translating the circuit to the truth
table .
Use this truth table to work problem.
What is I ?
go on but check.
a:
As in previous lessons · programmed tests,
start at block 1 and follow the numbered
instruction associated with your answer.
A
I= -----------:--
GO TO BLOCK 13
End of Lesson Six
You have completed the test for Lesson
Six .
10YOU ARE CORRECT!
20
A circuit which generates a high level at
the output when any or all of the inputs are
at a high level is called an
Refer to the text and return to BLOCK 1.
a.
AND gate
OR gate
GO TO BLOCK 2
GO TO BLOCK 21
YOU ARE INCORRECT!
21 YOU ARE CORRECT!
11 YOU ARE INCORRECT!
When using a truth table, a high level at the
in put or output is called a
a. Logic 0
GO TO BLOCK 11
b.
Logic 1
GO TO BLOCK 3
Refer to the text and return to BLOCK 21 .
22 YOU ARE INCORRECT!
b.
Refer to the text and return to BLOCK 10.
Refer to the text and return to BLOCK 3.
12 YOU ARE CORRECT!
3
YOU ARE CORRECT!
Again referring to a truth table a low level
at the input or output is called a
a. Logic 0
GO TO BLOCK 12
b.
Logic 1
GO TO BLOCK 22
What is V' or the output voltage when X = a
logic 1 ?
4
a:
Design a two-input diode OR gate where
R = 10K and V = 10V. Use silicon diodes.
V' = 10V -0.6V = 9.4 V
V' =
-----G~O-::--:T-:0-
B-
L 0--:-
C-:
K-:2-3
V'= V -10x VF = 10-6 = 4V
Because the input to the second gate is
the output of the first gate and so on, the
output of the chain will decrease as pro-
protionate to the length of the chain. Th is
fact puts a serious limitation on the use of
the diode gates.
23
13
1 = 9.4V = 0. 94ma
10K
The general rule for silicon diodes was
used.
Did you get the same result. If not, do not
go on but check .
If there were a chain of ten didoes OR in
series, what would V' be for th e final
stage?
a: V' =
GO TO BL OCK 4
[END OF PROGRAMMED TES T/6]
Did you get the same result? If not, do not
BREADBOARD FOR LESSON 6:
Diode Logic Gate Design
1.
"Wire up" the circuit in figure
1 on the breadboard. Before
applying power, set switches S1
and S2 in the low (L) position.
of the Truth Table . It reads input A
is at a logic 0 and input B is at a
logic 0 and the output X is at a
logic 0.
2. Apply power, -6V only . The
lamp should be lit.
When both inputs are at a logic 0,
diodes 01 and D2 are both
forward biased , and the output is
a logic 0 . This operating
condition is illustrated in section
1 of figure 6-5.
The logic is shown in the top row
3.
16
Set S1 to the high (H)
position . The Imp should remain
I it.
When S1 is in the high position
providing a logic 1 at input A,
diode 01 is zero biased . However,
D2 is still forward biased ,
clamping the output to a logic 0 .
This operating condition is
illustrated in section 2 of fig ure
6- 5.
The student should state this
logic cond ition in the second row
of the Truth Table.
4.
Set S1 to the low (L) position
and S2 to the high position . The
lamp should remain lit.
This operating condition is identi-
cal to the previous cond ition in
paragraph 3. The exception being
the states of D1 and 02 are
reversed . The student should
PLAY METER, May 1, 1981