Star Tech Journal

S*T J July 1981 9
Connect Signature Analyzer to:
D8-2 CLOCK J
D8-11 START/STOP J
Read signature at E7-10, if correct you have V SYNC.
•NOTE: On pins so marked an unstable or no signature may be noticed ....
ROMs, RAMs, DECODER
The ROM is the permanent memory which causes the processor system to begin and continue to perform in a predetermined manner. Bad
ROMs can and will cause the system to do crazy things. Fortunately ROMs are very easily tested by Signature Analysis. The easiest way is with
a Kurz-Kasch ROM Test I or ROM TEST II, but equally as accurate is with the Signature Analyzer.
For the ROM Test we still use the system clock for the Signature Analyzer, but for start/stop we must select a point which will allow
us to look at an individual device.
This point is the ROM enable (decoder). Figure 1 below shows the address decoder and what its outputs look like.
FIGURE 1
All
15
TIME
(:
=)
7442
The decoder is addressed by A 11 , 12. & 13.
1 nree address lines when decoded will cause 8 outputs to sequence.
I
2
3
4
A13
A12
A11
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
LJ
5
'
"1
8
With the Signature Analyzer connected in the address signa-
ture mode (startF. stop/lo A 15) you will get the signatures for the
7442 outputs . These signatures will assure you that the ROMs will be
properly enabled .
If we look at a ROM we can see what needs to transpire in order
to get it to output the data it holds .
Virtually all .pin connections are same for an BK EPROM through a 64K ROM.
Significant difference occurs on the EPROM VBB, YOO, and program pins.
These pins in ROM are either CS/CS functions or address inputs with some
manufacturers allowing no-connect options . Wrth N/C option , EPROM can be
directly replaced by ROM with no circuit change, except when using 16K or
larger.
We see that this EPROM (2716) is to be addressed by A~-A 10,
that it needs ground & t-5V for its operation . We also note there are
two pins , 18 & 20, CE1 and CE2 which may be used as enables .
If we tie pin 20 low we have a single enable , pin 18 (CE) . The bar over
the CE indicates th.at this pin must go low to enable the EPROM .
7442
Pin
Pin
Pin
Pin
Pin
Pin
Pin
Pin
1 goes
2 goes
3 goes
4 goes
5 goes
6 goes
7 goes
8 goes
low
low
low
low
low
low
low
low
EPROM ANO ROM PIN CONNECTION COMPATIBILITY
64 K
32 K
16 K
BK
ROM
ROM
ROM
ROM
SA M E
SA ME
SAM E
SA M E
SAM[
., '
.,
..
. .. , . ..
2
.
. .
SAM E
SA M E
o,
SA M E
o,
SAM E
16K ROM
SAME
SAME
SAME
SAM E
SAME
$AME
SAME
SAM E
SAME
CS / NC
CSfNC
J
., '
., ' ' " "
" "
SA M E
BK ROM
SAM E
o,
$A M E
Vs,
'
"
"
"
E
0
CSfNC
32K ROM
64 K ROM
SAME
.,,
-Voo
SAME / NC
- PROGRAM
CS/ NC
CS/ NC
. .,, ..
SAME
SAME
SAME
SAME
$AME
SA M E
$AM[
SA M E
SAME
SA M E
SAME
SAME
SA M E
SAME
SAME
SAME
SAME
SAME
SAME
CS/NC
...
CS / NC
CE
CE
A,o
.,,
SAME
Going back to Figure 1 we see that the 7442 outputs go low in sequence starting with the address lines all at "O". First pin 1 goes low. If we
tied pin 18 of the EPROM to Pin 1 of the decoder, for a period of time the 2716 would be low thereby enabled and would output data The data outputted
will be dependant upon the addresses applied, in practice the EPROM would be totally addressed and therefore all data contained therein would
appear at the data outputs (D~-D7). Further there will be an address change and a resulting data change with each clock pulse.
Since we wish to have the Signature Analyzer only look at the data bus (EPROM output) during the time the EPROM is enabled we set the
start-stop switches in a manner to portray the enable pulse.
The signature Analyzer will give a signature for each of the 8 data output data streams which would occur between the start and stop times.
Should there be more than 1 ROM or other memory device necessary to perform the computer's mission one would only need to connect the
other ROM (s) to the 7442 enables in the order you would want them to operate.
To read signatures for the additional ROM (s) one would only need to connect the Signature Analyzer to the enable pin (18) of the device you
wish to check
If when checking a multi ROM bank the signatures will not stabilize, remove all ROMs except the one you are checking, or connect a
4.7 K pull-up to data probe tip.
Here again faults such as outlined in the common fault section will be effective for isolating a problem.
Let us stop at this point and reflect where we are:
1. CPU is running
2. Address bus including drivers (buffers) is clear and healthy.
3. ROMs are being addressed and enabled properly.
4. ROMs are outputting proper data and the data bus is clear.
Next Month, we move on to the next major items in the computer. Rams, Multiplexers, Bus Drivers and Microprocessor Reset