January 1992
STAR*TECH Joumal
Area Code Decoder
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telling me that the problem was on the CPU board.
With the scope I found out the R/W, address lines,
data lines, clock, and memory request line were all
working. There were no reset, halt, bus acknowl-
edge or non-maskable interrupts, however. The
refresh for the dynamic memory was working, too.
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I decided then to take a closer look at the processor
to see if something more subtle was going on, like
the processor was stuck in a programming loop.
Triggering off the clock and monitoring Ml and
Input/Output Request or Memory Request you can
find out if the processor is doing an interrupt
acknowledge (Ml low, IORQ low), or an op code
fetch (Ml low, MREQ low). I found no interrupt
acknowledge cycles.
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Ah ha, this could be why there's no audio (theme
music comes from a different board that works
independent of the I/0 sound board), or video. The
processor was not receiving interrupt requests
from the Video board of the I/0 sound board.
I verified this by monitoring the Interrupt Request
line and the Non-maskable Interrupt Request line,
no activity. The first chip in line with the
processor's interrupt line is the CTC support chip
(Z8030), this chip is programmable through soft-
ware to time the interrupts. Bingo, I had found the
bad chip.
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CONCLUSION
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The valuable thing about taking the time to learn
processors and the support chips that go along with
the processor system (family), is that now you can
pass that information along to the next game with
that same processor.
This experience will continue to build your effi-
ciency, it may take a little more time to get the book
off the shelf and read a new or unfamiliar system,
but it will undoubtedly pay off.
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