26
STAR*TECH JOURNAL/JANUARY 1984
"Rally Video Car" continued from page 25.
The chips associated with the speed signals and the outputofD12 A are
intended to cause the screen display to move vertically at different rates of
change. This occurs before coin up and during acceleration and deceleration.
The schematics of part 2 show a circuit with the clock input to IC E6 as
CKVRVERT. This divider has outputs Vl, V2, V4, ... Vl28. These V
signals are used to control circuits that require varying vertical screen
movement speeds, such as the road video circuit. I think if you study the
circuits and the signal names you will understand the correlation between
them. Understand, however, that the speed signals are not clock signals but
merely enable signals to allow the gates they control to pass the required
clock and timing signals in order to generate or allow other circuits to
generate a certain special effect.
The strange-looking circuit that evolves around ICs F4 and F5 is a
special clock pulse combining and summing circuit that outputs the signals
designated by the Greek letter Epsilon. These "SUM" signals are used to
control the obstacle car generator circuit of Figure D.
The ICs atF4 andF5 are 74LS83 four-bit full binary adders. The binary
numbers to be summed are present at pins 16, 4, 7, 11 and 10, 8, 3, and 1 of
each full adder. The sum bits are on pins 9, 6, 2, and 15 of each adder. Pin 14
ofF5 and pin I 3 ofF4 are the carry input and carry output pins respectively.
F5 holds the most significant bits and F4 holds the least significant bits. The
sum outputs are intended to functionally be logical sums rather than
mathematical sums. This is what sets a logically based game such as this
apart from a microprocessor based game. Microprocessors can perform
logical functions, don't get me wrong. I am just stating in so many words that
this circuit could be easily and effectively reproduced using software rather
than hardware such as this.
In the near future we hopefully will be introducing a second version of
this game that will employ smaller, more efficient logic boards. Having not
seen one, I cannot say for sure if it will be microprocessor based, but
guessing from what I have heard, it probably is.
I am going to combine the description of the circuits in Figures B andD
because they essentially generate the same thing. I will not get into extreme
depth either. The main thing to know about these circuits is that the way they
are controlled is different The video signal called CAR4 in Figure Dis not
effectively player-controllable. CAR 4 represents the obstacle cars as
displayed (yellow) on the CRT. The timing signals are coming from the
counter circuit comprised oflCs E6, D5, and D6 (see schematics, part 2).
The clock signal to IC E6 is CKVRVERTwhich we have already discussed
(see Figure C). The frequency of CKVRVERT is determined by the" gear''
the player's car is in. As a result of this, the player's car has the effective
ability to stay with or pass the obstacle cars.
Since the graphics of the cars are identical PROM ICs Gl l (Figure B)
and H4 (Figure D), they are identically programmed and are hence
interchangeable.
The player's car(CAR 1) is horizontally positioned on the screen by the
steering circuit of Figure A. The control signals are QXC and QYC. As
described earlier, these signals are used to control the count ofICs Hl 1 and
Hl2. The resultant changing timing pulses to the PROM IC Hl 1 cause, in
effect, the red player's car to move laterally on the screen, hence allowing
direct control of the car.
The last circuit I will talk about is obviously an added extra to the game.
The engineer who designed this thing must have been having a ball!
Incidentally, the schematics are taken and redrawn from the original
prototype schematics. I guess if there are any super sharp minds out there,
you may be able to pick up on this guy's method of design. Looks like he
worked it out in his head sitting here looking at these originals. Now to the
foto finish circuit
At the end of a game where a score >400 has been attained, you will
notice the player's car change from what it was to a little man who jumps
frantically up and down while our audio circuit synthesizes a crowd
applauding. The video logic for this is stored in our PROM G 11. After every
game, the signal labeled G on (GAME ON) changes from hi to lo. This
transition triggers the 556 at A3 which is wired as a one shot for about a 5-
second duration. The output is labeled FF (foto finish) and is then inverted
to FF. IC J 10 has FF and SC*CRY supplied to its inputs. This AND gate is
an EN ABLE gate. SC*CRY is an output from the score circuit which will be
covered next month. FF is guaranteed to go hi at the end of every game.
SC*CRY will be hi only if the total score is >400. If the condition of Jl0 is
satisfied (both inputs hi), then the output of Jl 0 will enable H9 and PROM
G 11 to produce the video at about a 3.5 Hz rate. The PROM essentially
stores 2 frames of video.
Continued on next page.
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1 J7 8
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♦5
FIGURE B