Star Tech Journal

Issue: 1983-September - Vol 5 Issue 7

STAR*TECH JOURNAL/SEPTEMBER 1983
5
TROUBLESHOOTING
GO'l'l'LTEB'S
O*BERT/FOREGROUND, BACKGROUND
FOREGROUND
Foreground generation on the GG-III System is initiated with
three foreground registers (El-2, E2-3, E4) all addressed via the
microprocessor through program control. These registers are the
Foreground Horizontal Position Register(El-2), the Foreground
Object Select Register (E2-3) and the Foreground Vertical
Position Register (E4 ).
When the appearance of an object is required on a scan line,
as detected by the Vertical Position Detector, the address
generated by the Foreground Horizontal Position Register is
copied into the Line Object Position RAM (Hl-H4) and the
address generated by the Foreground Object Select Register is
copied into the Line Object Select RAM (11-J6). The Line
Object Position RAM contains the horizontal position of the
object for the next scan line while the Line Object Select RAM
contains the address for the Object ROM to address the desired
object.
Since the foreground object size is 16 pixels by 16 lines, the
Vertical Position Detector must generate enable pulses for 16
successive lines. The high order 4 bits of the Foreground
Vertical Position Register and the Vertical Counter are summed
(E5) and feed the Line RAM Enable Pulse Generator (E6, J8).
When the sum values of E5 are all high, the write enable is
generated. This pulse enables the transfer of data from the
Foreground Horizontal Position Register to the Line Object
Position RAM as well as the transfer of data from the
Foreground Object Select Register to the Line Object Select
RAM via the read/ write (WR) signal (FBA~d the chip
select (CS) signal (S2) from the multiplexer (G9). For each
pulse generated, information for the next scan line is loaded into
the Line RAM.
When the Line RAM Enable Pulse Generator generates a
pulse, it increments the 5-bit Line RAM Address Counter. This
counter produces the addresses for the Line Object Position
RAMs. When the Line Object Position RAM is being read, the
SYMPTOMS
Picture Rolls Vertically
Glitching
Missing Colors on Characters
Characters Vertically Separated
Incorrect Vertical Position of Characters
Vertical Lines on Screen
Incorrect Horizontal Position of Characters
Characters Horizontally Separated
Missing Characters
Blank Screen (Black or Blue)
Blurry Characters
8-bit Line Buffer Address Counter (H5, H6) is loaded( every 1.6
usec ). Before any new horizontal information can be loaded into
the Line RAM, the counter must increment 16 times in order to
address the 16 pixels that the foreground object will occupy that
frame time.
The low order 4 bits of the Foreground Vertical Position
Register and the Vertical Counter are summed (F5) and address
the object information to the Foreground Object ROM (K4, K5,
K6, K7-8) via the multiplexer (G5) and the Object ROM
Address Latches (Kl-K3).
The Foreground Object RO Ms receive their addressing from
three sources: ( 1) the high order 8 bits from the Foreground
Object Select Register, (2) 4 bits from the Vertical Position
Detector and ( 3) the least significant bit (RAO) comes from the
800ns counter (L12). This counter will output every 4 clock
cycles. The information out of the Object ROMs is loaded into
four parallel to serial shift registers (L4-5, Ll-6, L6-7, L7-8).
Every clock cycle the outputs of the four shift registers are
checked for data. If any output data, a write enable pulse (Kl 2,
Kl 3, K9) is generated allowing data to transfer to the Line
Object Buffers.
BACKGROUND
The Background Character Registers (E7) data is copied into
the Background Buffer RAM (E 10-11) during the first half of the
vertical blanking time through DMA transfer (E9-10). Once the
data is read by the Buffer RAM, the Character Register is ready
to be loaded with new information. The data in the Buffer RAM
is an 8-bit object number. This object number addresses the
Background Character ROM (Ell-12, E13) which contains
pixel definition for the background character. The Character
ROM will output 8 bits of information for two pixels for the 8-
pixel by 8-line character. The horizontal counter, Hl and H2,
and the vertical counter, VO, VI and V2, are used so that the
background object is displayed at the correct vertical and
horizontal positions on the screen for each frame.
POSSIBLE CAUSES
D17, E16, E17, Fl6, 114,117
D3, E5, G7, G9, 16,116,117, L13
Gl0, G13-Gl5, Kll-Kl3, L7-8
Dl5, Dl6, E4--E6, E15,J2, J5,J6, SIP71
E4,F5
110, Jll, K9, Kll
El-2, Gl, G2, Hl-H6, H8, SIP 72
H3, Lll, L12
D3, E2-3, L12
F15-Fl7, 116,117
E15, El6, G5, J5, J6
ReprintedcoortesyofGottlieb's"ONTARGEi
AMOA EXPOSITION 1983
... "Reflecting A Proud Industry" .. .
The AMOA's International Trade
Show for Coin-Operated Games,
Music and Allied Products will be held
at The Rivergate in New Orleans,
Louisiana, with headquarters at the
Hilton Hotel. The dates of this widely
received industry event are October 28-
30 (Friday-Sunday).
The AMOA Education Programs
will be held on the 27th through the
30th.
This exposition promises alot of
activity and interesting events. You'll
want to see the many exhibitors and
what they have to offer to keep you on
top of the industry.
Star*Tech Journal will be
represented in the Press Lounge, so
stop by and see us.
We look forward to meeting you.
For further information regarding
this Exposition, contact the AMOA at
312/654--2662.
STAR*TECH JOURNAL/SEPTEMBER 1983
6
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AND PARALLEL RESISTANCE/CAPACITANCE CIRCUITS
* * NON-VIDEO
GAME TROUBLESHOOTING (PART 2)
BALLY BABY PAC-MAN POWER-UP PROBLEM
By Mark "Bear'' Attebery, Vending International Corp., San Juan Capistrano, CA
Hello out there! Future Tech Lesson #7 is going into resistance and capacitance series circuits and
parallel circuits. The first thing you should do is purchase a calculator with scientific functions! This
calculator does not have to be expensive! There are many inexpensive ($14-$20) calculators that are
more than sufficient for 99% of a technician's needs.
Next, you must learn four formulae. Number one being more of a rule than a formula, that states
when resistances are connected in series, you simply add all of the resistance values together to find
the RT or total resistance. Here are two examples:
Superior
Brightness,
Clarity, Sharpness.
Rl + R2 + R3 = RT
~
1.2k + 3k + 1.8k = 6k
1.qK
For Info. Call: (213) 768-7144

RI
spectra
R'3
-VIS/On
Sun Valley, California
1.5"K
Rl + R2 + R3 = RT
1.9k + .6k + 1.5k = 4k
The second rule leans more toward the formula side. When capacitors are placed in series, the
total capacitance is found as follows:
!
1
1 = CT or capacitance total
Cl+ C2 + CJ
Using the formula above, try to find the value of CT.
1,1,J
~VIDEO
~GAME
TROUBIISHOmNG
GUIDE
FOR
VIDEO
T
10.uf-
'~Hr~~
I'm using a Texas Instuments Model No. 55 calculator that sells for approximately $35. If you're
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order from left to right
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6
*
I . I 6 I 1+ 1 -I 6 I I + I 3 I 1+ 1 -I
I I + I I I I +/-1 I I + I I
*
EE
1
0
EE
* *
EE
6
And your answer will be 944.882pf or .945uf! Easy, wasn't it? Well, if you have any questions or
doubts, there will be several problems to practice on at the end of this article. The third formula is for
finding the total resistance or RT of a parallel circuit and is really the same formula as used for finding
total capacitances in a series circuit The only difference is that resistance ( or Rl) is used instead of
capacitance (or Cl).
I TROUBLESHOOTING VIDEO CHARTS.
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And the key pad order on your calculator is as follows:
Continued next page.

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