Star Tech Journal

Issue: 1983-April - Vol 5 Issue 2

8
STAR*TECH JOURNAL/APRIL 1983
GO'l'l't ,TEB
* "Q*BERT'
SYMPTOMS/POSSIBLE CAUSES
* 8088 MICROPROCESSOR
NOTES
Troubleshooting "Q*Bert"
Foreground on the Gottlieb GG-III Video System is generated on a 16 x 16 pixel
format. Foreground characters can be moved to any point on the CRT with each having
its own priority scheme in relationship to the other foreground characters. The
foreground characters consist of: The word "Q*Bert" on the instruction frame, all
moving characters, the large letters for highest score on the high score table, Q*Bert's
balloon that appears when he collides with an enemy and the level number that is
displayed between levels.
Background is generated on an 8 x 8 pixel format and is behind all foreground with
the exception of a priority switch (when Q*Bert falls off behind the pyramid).
It is no secret that solid state hardware does sometimes become defective. It is for
this reason that the accompanying table of symptom/possible causes can be helpful
when troubleshooting the Gottlieb GG-III Logic Board. A note to remember: This list
has been compiled to assist the technician in troubleshooting the Logic Board. The list
of possible faults is not always definitive.
SYMPTOMS
FOREGROUND
NO FOREGROUND CHARACTERS ON SCREEN
FOREGROUND CHARACTERS DIVIDED HORIZ. AND STACKED ON
TOP OF EACH OTHER
TWO SEPARATE CHARACTERS APPEAR STACKED VERT.
THE WORD "Q•BERT' IS SEPARATED INTO SECTIONS
THE WORD "Q*BERT' APPEARS AS HEX NUMBERS
INCORRECT CHARACTERS APPEAR (I.E., SLICK IN PLACE
OF Q•BERT
FOREGROUND CHARACTERS ARE BLURRY (DISTORTED)
HORIZ. LINES THROUGH FOREGROUND CHARACTERS
UNEVEN MOVEMENT OF CHARACTERS
RIGHT HALF OF CHARACTER APPEARS ON THE LEFT SIDE OF
THE SAME CHARACTER
VERT. LINE ABOVE Q•BERT THAT BLANKS EVERYTHING ABOVE
Q•BERT
FOREGROUND DIVIDED VERT. (MIRROR IMAGE OF SELF)
FOREGROUND FROZEN (NO MOVEMEND
INCORRECT FOREGROUND COLORS
CHARACTERS APPEAR AS COLORED SQUARES
BACIGROUND
NO BACKGROUND CHARACTERS ON SCREEN
INCORRECT LETTERS GENERATED ON THE SCREEN
PURPLE SQUARE APPEARS AT BOTTOM OF LETTERS
DISTORTED LETTERS ON TOP HALF OF THE SCREEN
RANDOM LETTERS FLASHING RANDOMLY ON SCREEN
BACKGROUND CHARACTERS ARE BLURRY (DISTORTED)
JUMBLED BACKGROUND
PYRAMID DIVIDED INTO SEVERAL VERT. SECTIONS
HORIZ. LINES DIVIDE CHARACTERS
GREEN BACKGROUND WHEN Q•BERT IS SMASHED
INCORRECT BACKGROUND COLORS
POSSIBLE CAUSES
D2, E1-2, E2-3, E4, GB, J10,
J12 K11
G17, H10, L12
E1-2, E2-3, E4
SIP 71
J1, J2, KS
E1-2, E2-3, E4, G4, J1,
K1-K3
FS
K10, L7-8
SIP 72, SIP 73, H3, H4
FS
H3
617
E1-2
613,614,615, H12, KS, K10,
082-087
K1-K6, K7-8, L4-5, LS-6,
L6-7 L7-8
POSSIBLE CAUSES
DS, D10, EB, E10-11, E11-12,
E13 66 J7 JS J12
E10-11
L10
D9
D11, E7, EB, E9-10, JS
E10-11, E11-12, E13
E10-11, E11-12, E13
E10-11, E16
611
615
613,614,615, 082-087
8088 Microprocessor Notes
The Intel 8088 microprocessor is a third generation microprocessor with an 8-bit data
bus to memory and to 1/0 (Input/Output). The chip is a standard 40-pin dual inline
package (see Fig. 1) and operates from a single +5vdc power source. The 8088 is
extremely flexible in its application and is well suited for use in the GG-111 System.
The processor has dual operating modes ( minimum and maximum) which is allowed
by dual function pins selected by a strapping pin. The GG-III System utilizes the
minimum mode of operation. In this mode, these dual function pins transfer control
signals directly to memory and 1/0 devices.
The high efficiency of the 8088 is conducive to combining a 16-bit internal bus with
a pipeline architecture allowing instructions to be prefetched during spare bus cycles.
Microprocessors execute a program by repeating the simplified cycle shown on page 9.
9
STAR*TECH JOURNAL/APRIL 1983
1. Fetch the next instruction from memory.
2. Read the operand (if required by the instruction).
3. Execute the instruction.
4. Write the results (if required by the instruction).
These steps are usually performed serially by most microprocessors. The architecture
of the 8088, however, allocates these steps to two separate processing units within the
CPU. The execution unit executes instructions while the bus interface unit fetches
instructions, reads operands and writes results. Both units work independently of each
other and are able to overlap instruction fetch with execution. This means that the time
required to fetch an instruction, during normal program sequence, disappears because
the execution unit executes instructions that have already been fetched by the bus
interface unit.
Below are listed several of the functions allowed by the minimum mode of the Intel
8088 microprocessor as applied to the GG-111 System: The NMI (Non-Maskable
Interrupt), pin 17, will receive pulses 61 times a second. The pulse is generated when the
CRT' s vertical blanking time begins. During this blanking time the background register
(E7) transfers data to the background buffer (E 10-11) through DMA (Direct Memory
Access) for the next frame. The DT/R (Data Transmit/Receive), pin 27, controls the
direction of data flow via the Data Transceivers ( C4) DIR (Direction Control Input)
pin. This allows data to flow from the A bus to the B bus or from the B bus to the A bus.
The DEN (Data Enable), pin 26, allows or disables data flow by placing a voltage level
on the G (Enable Input), pin 19, on the Data Transceiver (C4) _so that the bus is
effectively isolated. The ffi (Read Control), pin 3 2, manages the OE ( Output Enabl@)
of the program RO Ms as well as enabling the output of the Background Character
Register (E7) and the Input Port Select (Bl0). The l0/M (IO/Memory Control), pin
28, is utili~ to differentiate between either program memory or 1/0 on the processor's
bus. The WR (Write Control), pin 29, controls the read/write function of the system
RAM as well as clocking the Output Port Flip Flops (AS, A9, AlO).
This is a general pin function description that can be utilized when troubleshooting
the GG-111 System. The other pins on the microprocessor are all self-explanatory on
the illustration ( see Fig. 1 ).
4-0
~
,~
A'?)
A11
A17.
An
Al4
A15
A.
10
2, .R.E~ET
s
1.1.
HOW MANY TIMES ARE YOU WILLING TO
HEAR, "YOUR BOARDS ARE NOT READY
YET'? MAKE THE CHANGE - COME SEE
US AND GET RESULTS - NOT EXCUSES!
AO¢
A01
AO:l
A07>
AD4
ADS
AO"-
A07
RE.ADY
'1- -,Z'f
TIRED OF WAITING
FOR YOUR BOARDS?
AL~
81
"FLAT RATE"
prices for all repair and exchanges
on printed circuit boards:
C.PU
8089
17
In an effort to streamline the processing and speed up our
prinled circuit board repair/exchange program, we have
established a "flat rate" price for all repair and exchanges
(Monitor PC Boards not included).
These rates will NOT apply: (1) II board has been
brutalized or damaged by the customer. Missing components
wil! be charged separately. (2) Two sets of boards in metal
cases.
"Flat rate" charges will apply in ALL other cases.
NMI
H· l~TA
9
P.O. BOX 810
NICOMA PARK, OK
73066
Alo
CLK.
~
'
Cals
Coin
College
MN/MXA8
8
2
TWO-WEEK COURSE
COVERS VIDEO AND
PINS. BY SCHEMATICS!
OUR 11th YEAR!
405/789·534
-t-S V
~ 15
School Por
Electronic
lames
~o
HLOA
34 55¢
i)T/~
DEN
IS
31
INT~
HO\.O
l..7
z~
LOGIC, CPU, MPU .. . $60
POWER SUPPLY ..... 41
SOLENOID DRIVER . . 41
SOUND/AUDIO . ..... 41
ATARI AUXILIARY ... 70
SCORE DISPLAY .. $41
LAMP DRIVER ...... 32
TRANSFORMER ..... 34
ATARI VECTOR
GENERATOR .... . . 70
RD
2.,
10/M
1.8
Fastest Service ... Quantity Discounts ... Call Now!
.z.~
FRISCO ELECTRONICS
& VENDING INC.
"""-
3299-19th Street San Francisco, CA 94103
L..__-+---'
20
FIGURE 1
Reprinted courtesy of Gottlieb's technical newsletter, "On Target".
(Authorized Atari Service Center)
OPEN 24 HOURS!
DAY: (415) 648-5466 NIGHT: (415)359-5641

Download Page 8: PDF File | Image

Download Page 9 PDF File | Image

Future scanning projects are planned by the International Arcade Museum Library (IAML).

Pro Tip: You can flip pages on the issue easily by using the left and right arrow keys on your keyboard.