Play Meter

Issue: 1981 May 01 - Vol 7 Num 8

[Test 5 continued from previous page)
What is lc?
a:
lc = _ __
_
GO TO BLOCK 4
b.
19
0.4Bma ~ I a ~ 1. 92ma
TM 11ng1 In o wu tourtd to M ' O. Sire S o
lrom ltsson one .
~
O. PP. Form11l• 3
Did you get the same result ? If not, do not go on,
but check your celculatlon.
20
YOU ARE CORRECT!
Collector to ground
GO TO BLOCK 12
21 YOU
ARE INCORRECT!
The output from an emitter-follower is
from
Refer to the text and return to BLOCK 2.
a.
[End of programmed test for Lesson
Fi ve)
Emi tter to ground
GO TO BLOCK 2
BREADBOARD PROJECT FOR LESSON 5:
Emitter Follower Design
"Wire up" the circuit in figure
1 on the breadboard. Before
applying power, set P to the full
CCW position .
1.
2.
and the transistor is operating at
point C in figure S-2, on the curve
Vin = V (where V equals -6V) . The
output voltage is now almost -6V
Apply power, -6V only.
-6V
-6V
3. The lamp should not light.
The circuit is operating at A in
figure 5-2. The base is zero biased
and, therefore, IE = 0. The only
current flowing is leo which is too
small to cause a voltage drop
across RE worth accountin for. A
voltmeter (if one is available)
would verify this fact.
The output is also at OV since the
voltage across the lamp is OV.
4. Adjust the potentiometer
slowly to about halfway to the CW
position .
Note that the lamp begins to glow.
The circuit is now operating at
point B in figure S-2, on the curve
Vin3. The voltage from base to
ground is, of course, about 3V.
The voltage across the lamp is
about 2.8 volts . (When the
transistor is operating in the
"active region," VBE = 0.2V for
germanium transistors.)
5. Set P to the full CW position .
The lamp is now glowing "full"
p
and the voltage drop across the
transistor is about VBE.
By performing this experiment,
the student should have observed
the fact that the emitter "follows"
the base as the base voltage is ad -
justed up and down . Hence, the
term "emitter follower." Second-
ly, he should have noticed that the
input and output voltages are in
phase .
6.
Disconnect the power.
7.
"Wire-up" the circuit in figure
on the breadboard . Before
applying , set S to the low (L)
position .
2
Figure 1
8.
-6V
r
I
I
-
Apply power, -6V only.
-6V
-~
I
s,
I
~ l--J
Figure 2
9. The lamp should not light.
The circuit is operating at point A
in figure S-2, on the curve Vin = 0.
The output is at a low level.
10. Set S1 to the high (H)
position . The lamp should glow.
The circuit is now operating at
point C in figure S-2, on the curve
Vin = V (where Vin = -6V ). The
circuit has made a rapid transition
through point B.
The output is now at a high level
and in phase with the input.
Sega had lower earnings in Japan in '80
LOS ANGELES- Sega Enterprises,
Inc. reported net earnings of $3.2
million, or 45¢ per share, for the
second quarter of its fiscal 1981 ,
ending December 31, 1980. This
compared with $4 million, or 55¢ per
share, for the prior year's second
quarter.
Net earnings for the second
quarter included gains from trans-
lation of foreign currency denomina·
ted assets and liabilities into U.S.
dollars and foreign currency transac-
tions of $396,000, or 6¢ per share,
versus $551,000, or 8¢ per share, in
14
the fiscal 1980 second quarter.
Net earnings were $5.4 million, or
76¢ per share, for th six months
ended December 31, as against $10.2
million, or $1.42 per share in the
previous year's first half.
Revenues for the current six
months fell to $74.4 million
compared with $83.3 million for the
same period last ~ear .
The company's consolidated net
earnings for the quarter were down
as a result of a decline in net earnings
from its Japanese business interests,
the company an~ounced. However,
the company's U.S. business had
record second quarter revenues and
net earnings from the sale of its coin-
operated electyronic video amuse-
ment games, said David Rosen,
chairman of the board and president
of Sega.
The company experienced lower
revenues from games operated in
Japan, as well as higher costs of
games sold and operated in that
country.
Sega is an 85-percent owned
subsidiary of Gulf +We s tern
Industries, Inc.
PLAY METER, May 1, 1981
LESSON 6:
Diode Gate Design
A
8
X
A
II
X
0
0
0
0
I
0
I
0
I
I
I
I
I
I
0
0
0
I
0
0
0
I
I
I
OR Colt
AND Co le
1·1 ~
F i g,
Truth tebltt tor AND and OR t a les . A 0
r t pt t . . nll
a low voltage level and a I a hlth voltat• level .
-V
Oucput
R
Th is lesson will introduce the
student to logic and truth tables
as well as the design of diode
gates. Both AND and OR gates
are covered .
Logic Gates and Truth Tables:
Logic gates are circuits which
have a single output and two or
more inputs the state of the out-
put is a funct ion of a set of rules
concerning the states of the in-
puts. For example, the output of an
AND gate is a high level if and only if
all of the inputs are at a high level.
The output state of an OR gate is a
high level if one or more of the inputs
is at a high level.
F ig . 1 ·2 . A
IC:hemt~tlc
dlatretn of 1 two Input di ode OR ,. ,, ,
-\1
"
-V
8
x.
II• OJ
~
A
~
" .,. 9 .,.
..,.
..,.
Fig . l · l . A d iagram ot a diode OR gate with all of the poas lbla
Input stat ...
-V
-V
R
F it . 1--4. A .c.hem1tlc dlattam ot • two Input diode AN D gate.
The studen t shoul d compare th i s circu i t to thet ot the OR ,.,,
In F i t . 1-2.
-V
-V
-V
-V
-V
-V
A«D
"
R
0
H
-v·
1
Fit. W . A di . . MI of • diode AND t•t• with all of tM
po.,llllt Input atatat .
PLAY METER, May 1, 1981
Instead of defining a logical
operation in words, an alternative
method is to define a high level as
logic 1 and a low level as logic 0.
Also , a truth table can be drawn . It
will contain all possible input
states and their corresponding
output state. In fig. 6-1 are the
truth tables for two input AND
and OR gates. The inputs are
labled A and B and the outputs
is labled X. Notice that the
defin itions given above are con -
sistent with the truth tables.
Diode OR Gates:
The circuit in fig. 6-2 is a diode
OR gate. The circuit operates as
follows : When both the A and B
inputs are at a logic 0, both diodes
are zero-biased , and no current
flows through the resistor R.
When no current flows , the
voltage drop across R is, of
course, zero. Therefore, the out-
put X is a a logic 0. This condition
isillustrated in fig . 6-3, section 1.
When either output A or B is
at logic 1, a current will flow
through R. When a current flows
through R the output raises to a
voltage V' because of the voltage
dropped across R. Therefore, the
output X is a log ic 1. It is easily
seen in fig. 6-3, section 2, that V' is
VF less than V. Also, notice that
the current through the diode is 1
plus the leakage current (IR) of
the zero-biased diode.
The condition of both A and B
inputs at logic 1 is illustrated in
section 3 of fig . 6-3. Notice that I is
now divided between both diodes
and that output X is at a logic 1.
The student should veri fy that the
operation of the diode OR gate in fig.
6-2 is consistent with the OR gate
truth table in fig. 6-1 . Fig. 6-3 should
be used as an aid for translating the
circuit to the truth table.
Design Procedure:
I V ' I·
STEP 1 : De termin e
VF is generally stated on the manu-
facturers ' data sheets. However, as a
general rule: VF for silicon diodes H
0.6V, and for germanium diodes, 02V
can be used.
STEP 2: F ind I.
I v 'I
I
R
Design Example:
Design a two-input diode OR
gate where R is a 6V, 150-omega
lamp. Use a silicone diode type
1N914. (The circuit diagram is
shown in fig. 6-2.
STEP 1 : Determ ine
6.0V - 0 .6V
=
The
IV ' I .
=
5 .4V
general rule for si licon
diodes is used.
STEP 2: Find I.
I
=
V,
R
5.4V
1500
38m a
Diode OR Gates:
The circuit in fig. 6-4 is a diode
AND gate. The circuit operates as
15

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