our whole electronics world continue
to evolve.
CHIP PROBLEMS
As I discussed previously , the
areas of concern are internal to the
device . The wire bonds are perhaps
the most important , tending to dis-
lodge themselves when subjected to
extre me force , like someone drop-
ping a circuit board .
Another area is the die -attach
ad hesion between the chip die and
the substrate material. In plastic
packages the substrate material is a
metal such as timed phosphor bronze
or Kovar (industrial gold) or a treated
nickel steel. The adhesion problems
occur if the package has lost its her-
metic seal.
Occasionally , the lead frame is
soldered in place in ceramic
packages. The solder could oxydize ,
causing a crystallization of the solder
joint and the electricval-to-mechani-
cal interface would be looking into
an extremely high resistance . This
would yield an open output or a
noisy input of an integrated circuit .
Basically , it would be the proverbial
"cold solder joint. " But , aside from
the package and assembly problems,
the bulk of the failures will be caused
by the failure of the silicon die . There
are an overwhelming number of
considerations that could be dis-
cussed having to do with the nature
of failures of an inteqrated circuit die .
What I would like to highlight are
the major considerations and not the
process considerations . Component
failure due to a process problem
breaking down is extremely probable
and therefore a real consideration .
However , the types of problems of
which we will typically experience are
due to the failure of a junction . Most
logic devices are comprised of a
multitude of transistor sections which
interreact to produce the gating
effect.
As an end product , the inputs and
outputs of a semiconductor device
are routed through sections of
transistor arrays which react accord-
ing to a table known as Boolean
logic. This TTL mathematical array
does nothing more than perfom like
a multi-legged traffic cop .
But beneath it all is the single
transistor and all the transistors which
comprise the cell of the logic unit.
When you reduce a complex array to
a single cell , the transistor , you can
see there is a unique commonality.
Since a transistor is in fact a dual
diode in its own right ,it has pre-
dictable characteristics of its junc-
tions . When in thought , you reduce a
complex l.C . to the state of a multi-
tude of dual diodes , and you can see
the commonality : they all share a
reference plane .
In TIL devices the reference plane
is typically GND , the emitter side of
the output. Specifically , it is common
reference and electron source from
which the device junction shares its
electrons with the output . This
migration of electrons from the
source to the drain is the principle of
the semiconductor junction . How the
junction is doped is, in essence , the
resistance which effects the flow of
current from the source to the
drain -emitter to collector .
In a true semiconductor material ,
the resistance of the junction changes
with the current flow . Whatever
method is used to modulate or gate
the current flow from the emitter to
the collector is a function of the bias
supplied to the base of the transistor
cell. The significant item is that all
cells share at least one reference
plane with each other and to its own
junction structure .
Therefore , it is possible to test all
the junctions in a device because
whatever junction has malfunctioned
will affect the current flow in the
circuit cell which is being tested.
This effect may be catastrophic like
a short, or subtle like an infinite
impedance indicating an open .
These circuit cells are the building
blocks for logic devices . Even though
a single cell like a transistor can be
reduced to a dual diode equivalent ,
the fact remains that the junctions are
susceptible to electrical problems as
well . Overvoltage will zap a junction
in nothing flat because the two
conductive layers of the junction
have arched their way through the
thin dielectric dopant or passifying
layer. Another typical problem is the
device's sensitivity to transient spikes
of energy and spurious transmissions
of signals through cross-talk (multi-
path) . These problems can create a
situation whereby the signal potential
is so great for a fraction of a second
that electron mobility is seriously
affected . The electrons become
forced out of their orbitals and into
another atom 's outer ring .
This establishes an ionic path
whereby the adjacent atoms become
depleted of source electrons and
therefore are not able to pass on
electrons when needed . In essence ,
the current path has become open
because of more holes present that
electrons to fill them .
The end result looks like a P-type
material and the internal resistance is
too high to conduct. Besides shorts
and opens there are dynamic
problems, especially in memories
that require refresh or components
which require strobe pulse . Dynamic
problems are those which do not
manifest themselves under heavy
load , in -circuit and after it is warmed
up .
Typically , what occurs is the
breakdown of an oxide layer which is
used to separate or space apart to
adjacent monolithic circuit traces.
Minute crack and fractures in the
passification layer of material will
allow electron migration through ion
exchange to gather free electrons
when available . Eventually there is
enough of a current path that a signal
will walk astray using the skin effect
of transmitted signals .
Then there are the hair line cracks
in metalized areas which expand
when heated and therefore would
open a circuit leg . The expansion
characteristics of semiconductor
materials are known as the thermal
co-efficient of expansion (TCE) .
When materials are used to make
an interconnection it is known as the
thermal co-efficient of coupling
(TCC). Both of these areas are sub-
ject to problems if the chemistry
employed in the fabrication process
was poorly monitored , carelessly im -
plemented , inadvertently confused
or altered. And, of course , a wide
range of operator-induced problems
through the possible misuse of the
equipment can occur , even if only for
a split second.
That part which slips through the
inspection people during fabrication
or assembly will undoubtedly wind
up on your bench . Whether it is a
PROM , digital , or linear device , that
faulty part will be waiting for you to-
morrow . How are you going to
deal with it?
Since our choices are relatively
limited, in diagnosis procedures or
even component fault analysis , what
continued on page 7
OOPS!
Two illustrations in the Technical
Topics section of PLAY METER ,
April 15 , 1980 indicated the wrong
terminal denominations for the
SE9302 and similar transistors .
( Illustration here corrects the termin -
al designations.) This diagram was
mislabeled in "A common pinball
problem ," page 63 , figure 3 , of the
April issue . We all apologize . -Editor